AIAA SF, P.O. Box 1548, Mountain View, CA 94042-1548
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AIAA SF, P.O. Box 1548, Mountain View, CA 94042-1548 |
Thursday, December 1, 2011; 6:30pm-8:00pm
Hacker Dojo, Mountain View
Bob Feretich
RAF Research
San Jose, California
Designed originally for smartphones and tablets, mobile application processors have expanded their impact to robotics and small avionics. Like their larger cousins, many of these provide hardware support for 4-element floating point vectors, thereby making them attractive for guidance, navigation, and control. Their small size and low cost have made them ideal for university research and even hobbyist projects. At San Jose State Univ., a couple of student design projects are utilizing the BeagleBoard and TI OMAP3 processors for rover and satellite applications. Bob Feretich is a veteran Silicon Valley engineering manager who now builds rockets and mentors SJSU engineering students in projects using these processors. He will describe the architecture of these processors, and how they are used in engineering projects, including specific examples from the SJSU projects.
[Photo at top: BeagleBoard rev C4, with a 720 MHz TI OMAP3530 processor, which combines an ARM Cortex-A8 CPU, a SGX PowerVR 3D renderer, and a digital signal processor. The board also has a USB port, S-Video and DVI-D ports, 3.5mm audio in and out, and an SD/MMC card slot. More info about the board at beagleboard.org. ]
Bob Feretich is an electrical and computer engineer with a long record of technical leadership in computer industry. He is now Managing Director of RAF Research, a consulting company specializing in real-time and Linux embedded systems, and software for device control and scientific applications.
He has developed an inertial navigation subsystem for attitude control of amateur rockets, and as part of the general navigation system of the SJSU SNAPS and Lunar Rover prototypes. The subsystem uses SoC (system-on-a-chip) microcomputer hardware in conjunction with both real-time and general-purpose software in a deeply embedded application.
Prior to RAF Research, Mr. Feretich served in key management and technical roles at Sun Microsystems, including Director of Platform Development and Assistant Chief Technologist of the Telecommunications Platforms Group. His teams produced over 20 board level products for Sun. In 1998, he won the Sun President's Award for Strategic Leadership. Prior to Sun Microsystems, Mr. Feretich served Vice President of Engineering for Vertex Semiconductor Inc. a Toshiba subsidiary. He has published papers on Network Server Computer Architecture, Automated Logic Partitioning, Formal Logic Verification, and VLSI Design using High Level Languages. He holds two circuit design patents.
Mr. Feretich is a member of IEEE; and rocketry organizations AEROPAC, LUNAR, TRIPOLI, and National Assoc. of Rocketry (NAR). He is also a Founding Member of the Silicon Valley Space Center.
For those who want to research available material before the talk, here are some available resources:
Sign-in, networking and refreshments at 6:30 pm;
presentation at 7:00 pm;
program ends at 8:00 pm.
This meeting is open to the general public.
Hacker Dojo
140A S. Whisman Rd.
Mountain View, CA,94041
(650) 898-7925
Map: Hacker Dojo
For more information about this meeting, contact AIAA SF Technical Programs Director Rick Kwan .
| This TechTalk program is co-sponsored by the Silicon Valley Space Center as part of its campaign to accelerate access to space. |
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| We also thank members of the Hacker Dojo for their support of this program. |
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